Name
Title | ||
|---|---|---|
A Worst-Case-Aware Design Methodology for Noise-Tolerant Oscillator-Based True Random Number Generator With Stochastic Behavior Modeling |
Abstract | ||
|---|---|---|
This paper presents a worst-case-aware design methodology for an oscillator-based true random number generator (TRNG) that produces highly random bit streams even under deterministic noise. We propose a stochastic behavior model to efficiently determine design parameters, and identify a class of deterministic noise under which the randomness gets the worst. They can be used to directly estimate the worst $\\chi$ value of a poker test under deterministic noise without generating bit streams, which enables efficient exploration of design space and guarantees sufficient randomness in a hostile environment. The proposed model is validated by measuring prototype TRNGs fabricated with a 65-nm CMOS process. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/TIFS.2013.2271423 | IEEE Transactions on Information Forensics and Security |
Keywords | Field | DocType |
CMOS integrated circuits,oscillators,random number generation,stochastic processes,CMOS process,TRNG,deterministic noise,noise-tolerant oscillator,stochastic behavior modeling,true random number generator,worst-case-aware design methodology,Jitter,Markov chain,True random number generator,stochastic model | Stochastic optimization,Computer science,Real-time computing,Artificial intelligence,Random number generation,Randomness,Stochastic simulation,Pattern recognition,Deterministic noise,Stochastic process,Algorithm,CMOS,Deterministic system | Journal |
Volume | Issue | ISSN |
8 | 8 | 1556-6013 |
Citations | PageRank | References |
6 | 0.64 | 6 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Takehiko Amaki | 1 | 23 | 3.28 |
| Masanori Hashimoto | 2 | 462 | 79.39 |
| Yukio Mitsuyama | 3 | 134 | 20.01 |
| Takao Onoye | 4 | 329 | 68.21 |