Name
Title | ||
|---|---|---|
FPGA design and implementation of a matrix multiplier based accelerator for 3D EKF SLAM |
Abstract | ||
|---|---|---|
In hw/sw co-design FPGAs are being used in order to accelerate existing solutions so they meet real-time constraints. As they consume less power than a standard microprocessor and provide powerful parallel data processing capabilities, they remain a highly optimizable tool and object of research within an embedded system. In this paper we present an efficient architecture for matrix multiplication accelerator conceived as a systolic array co-processor to IBM's PPC440 processor on Virtex5 XC5VFX70T FPGA. Our design is afterwards synthesized and wired as a large-scale matrix multiplier required for an embedded version of a visual Simultaneous Localization and Mapping (SLAM) algorithm based on Extended Kaiman Filter (EKF). This algorithm is implemented entirely as a System On a programmable Chip (SoC) design on the FPGA; an EKF epoch is executed at least 7.3 times faster than the pure software implementation, maintaining and correcting 20 points in the map. This optimization permits an EKF block throughput to be increased from 6.07Hz to 44.39Hz, which exceeds our real-time constraint of 30Hz. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/ReConFig.2014.7032523 | ReConFigurable Computing and FPGAs |
Keywords | Field | DocType |
Kalman filters,SLAM (robots),control engineering computing,embedded systems,field programmable gate arrays,hardware-software codesign,integrated circuit design,logic design,matrix multiplication,microprocessor chips,nonlinear filters,parallel processing,system-on-chip,systolic arrays,3D EKF SLAM,EKF block throughput,EKF epoch,FPGA design,IBM PPC440 processor,SLAM algorithm,SoC design,Virtex5 XC5VFX70T FPGA,embedded system,extended Kalman filter,hw/sw codesign,large-scale matrix multiplier,matrix multiplication accelerator,matrix multiplier based accelerator,microprocessor,optimization,parallel data processing capability,real-time constraint,software implementation,system on a programmable chip,systolic array coprocessor,visual simultaneous localization and mapping algorithm | Extended Kalman filter,Computer science,Microprocessor,Field-programmable gate array,Systolic array,Multiplier (economics),Chip,Real-time computing,Simultaneous localization and mapping,Matrix multiplication,Embedded system | Conference |
ISSN | ISBN | Citations |
2325-6532 | 978-1-4799-5943-3 | 7 |
PageRank | References | Authors |
0.49 | 15 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Daniel Tortei Tertei | 1 | 7 | 0.49 |
| Jonathan Piat | 2 | 52 | 5.17 |
| Michel Devy | 3 | 542 | 71.47 |