Abstract | ||
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In the past decades, the Residue Number System (RNS) has been adopted in DSP as an alternative to the traditional two's complement number system (TCS) because of the savings in area, higher speed and reduced power dissipation. In this work, we perform a comprehensive Design Space Exploration (DSE) for a fused multiply-add unit by taking into account four metrics: area, delay, power consumption, and switching activity. The results of the DSE are verified against the TCS and RNS implementation of parallel FIR filters of different characteristics. In both the DSE and the filter implementation, we consider two design corners: maximum speed and minimum area. The experimental results demonstrate that for high data rates and high order filters, the RNS implementation is more power efficient than the TCS because of the reduced switching activity and the larger amount of low-power cells placed in the unit. |
Year | DOI | Venue |
---|---|---|
2015 | 10.1109/MWSCAS.2015.7282052 | Circuits and Systems |
Keywords | Field | DocType |
FIR filters,digital signal processing chips,residue number systems,DSE,RNS multiply-add units,TCS,complement number system,design space exploration,parallel FIR filters,power efficient DSP,switching activity | Digital signal processing,Dynamic range,Power efficient,Dissipation,Computer science,Electronic engineering,Residue number system,Finite impulse response,Design space exploration,Power consumption | Conference |
ISSN | Citations | PageRank |
1548-3746 | 1 | 0.35 |
References | Authors | |
3 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Gian-Carlo Cardarilli | 1 | 57 | 14.97 |
Nannarelli, A. | 2 | 22 | 5.71 |
massimo petricca | 3 | 1 | 0.35 |
Marco Re | 4 | 194 | 35.03 |