Name
Year | DOI | Venue |
|---|---|---|
1999 | 10.1109/IJCNN.1999.836163 | IJCNN |
Keywords | Field | DocType |
hardware,truth tables,vlsi,evolutionary algorithm,logic design,algorithm design and analysis,evolutionary computation,sonar,genetic algorithm,spectrum,backpropagation,digital circuits,chip,field programmable gate arrays,genetic algorithms,design methodology,field programmable gate array,pattern recognition,prototypes | Logic synthesis,Digital electronics,System on a chip,Computer science,Field-programmable gate array,Chip,Sonar,Artificial intelligence,Very-large-scale integration,Machine learning,Genetic algorithm | Conference |
Citations | PageRank | References |
2 | 0.44 | 2 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Moritoshi Yasunaga | 1 | 178 | 33.03 |
| taro nakamura | 2 | 2 | 0.44 |
| Ikuo Yoshihara | 3 | 120 | 18.53 |