Name
Papers
Collaborators
IKUO YOSHIHARA
39
46
Citations 
PageRank 
Referers 
120
18.53
271
Referees 
References 
226
134
Search Limit
100271
Title
Citations
PageRank
Year
Evolutionary design of high signal integrity interconnection based on eye-diagram00.342018
An evolutionary design methodology of printed circuit boards for high-speed VLSIs00.342016
A passive equalizer and its design methodology for global interconnects in VLSIs00.342016
Simultaneous Improvement to Signal Integrity and Electromagnetic Interference in High-Speed Transmission Lines00.342015
Asynchronous migration for parallel genetic programming on a computer cluster with multi-core processors10.392012
Digital-signal-waveform improvement on VLSI packaging including inductances00.342011
Development of a novel crossover of hybrid genetic algorithms for large-scale traveling salesman problems00.342010
Signal-integrity improvement method and its robustness evaluation for VLSI and VLSI-packaging00.342010
A visual-inspection system using a self-organizing map00.342009
Feature extraction of protein expression levels based on classification of functional foods with SOM00.342009
The Segmental-Transmission-Line: Its Design and Prototype Evaluation20.532008
Variable-length segmental transmission line and its design guidelines00.342008
A reconfigurable VLSI-based double-lens tracking camera20.502008
Real-world applications on the reconfigurable-VLSI-based double-lens tracking-camera00.342008
A New Three-Level Tree Data Structure for Representing TSP Tours in the Lin-Kernighan Heuristic20.382007
Bio-Inspired Functional Asymmetry Camera System00.342007
A bio-inspired tracking camera system30.742007
Implementation of an Effective Hybrid GA for Large-Scale Traveling Salesman Problems732.732007
Enhancement Of The Variable-Length-Transmission-Line Design Method For Multi-Point Optimization20.522006
Variable Length Segmental-Transmission-Line And Its Parameter Optimization Based On Ga20.452005
Performance evaluation system for probabilistic neural network hardware.00.342004
Performance evaluation system for probabilistic neural network hardware40.772004
Multi-Modal Neural Networks for Symbolic Sequence Pattern Classification.00.342004
Multi-Modal Neural Networks For Symbolic Sequence Pattern Classification00.342004
A multimodal neural network with single-state predictions for protein secondary structure00.342004
Gene finding using evolvable reasoning hardware60.562003
Comparison with Defect Compensation Methods for Feed-forward Neural Networks00.342002
Simulations of construction learning for neuron-computer resources00.342001
Evolvable Reasoning Hardware: Its Prototyping and Performance Evaluation20.512001
Genetic Algorithm-Based Methodology for Pattern Recognition Hardware151.022000
The application of genetic algorithms to the design of reconfigurable reasoning VLSI chips30.522000
Kernel-Based Pattern Recognition Hardware: Its Design Methodology Using Evolved Truth Tables00.342000
A High Speed and High Fault Tolerant Reconfigurable Reasoning System: Toward a Wafer Scale Reconfigurable Reasoning LSI00.342000
A Fast Model-Building Method for Time Series Using Genetic Programming00.342000
Kernel Optimization in Pattern Recognition Using a Genetic Algorithm00.342000
Sonar spectrum recognition chip designed by evolutionary algorithm20.441999
A scaling law between the number of multirobots and their task performance10.351999
Parallel back-propagation using genetic algorithm: real-time BP learning on the massively parallel computer CP-PACS00.341999
Book Review: Genetic Programming IV00.341997