Name
Abstract | ||
|---|---|---|
This paper reports a 65 nm 8 Mb spin transfer torque magnetoresistance random access memory (STT-MRAM) operating at a single supply voltage with a process-variation-tolerant sense amplifier. The proposed sense amplifier comprises a boosted-gate nMOS and negative-resistance pMOSs as loads, which maximizes the readout margin at any process corner. The STT-MRAM achieves a cycle time of 1.9 mu s (= 0.526 MHz) at 0.38 V. The operating power is 1.70 mu W at this voltage. The minimum energy per access is 1.12 pJ/bit when the supply voltage is 0.44 V. The proposed STT-MRAM operates at a lower energy than an SRAM when the utilization of the memory bandwidth is 14% or less. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1587/transfun.E97.A.2411 | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES |
Keywords | Field | DocType |
STT-MRAM, low-voltage, process-variation-tolerant | Sense amplifier,Negative resistance,Theoretical computer science,Magnetoresistive random-access memory,Low voltage,Electrical engineering,Mathematics | Journal |
Volume | Issue | ISSN |
E97A | 12 | 0916-8508 |
Citations | PageRank | References |
0 | 0.34 | 1 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yohei Umeki | 1 | 2 | 1.72 |
| koji yanagida | 2 | 3 | 1.61 |
| Shusuke Yoshimoto | 3 | 30 | 12.56 |
| Shintaro Izumi | 4 | 82 | 31.56 |
| masahiko yoshimoto | 5 | 117 | 34.06 |
| Hiroshi Kawaguchi | 6 | 37 | 21.08 |
| Koji Tsunoda | 7 | 2 | 1.04 |
| T. Sugii | 8 | 21 | 4.18 |