Name
Abstract | ||
|---|---|---|
NAND flash-based solid-state drives (SSDs), which can serve as the caches of hard disk drives, have gained popularity in large-scale, high-performance storage. A type of advanced error correction code for SSDs, low-density parity-check (LDPC), is required to mitigate a considerable number of errors in the raw data of NAND flash. However, LDPC imposes read performanceoverhead due to the complex decoding procedure of LDPC. In this paper, we propose an error-correcting cache (EC-Cache) that exploits “error locality”, a characteristic of NAND flash memory, to improve the read performance of SSDs. We use the term “error locality” to refer to the property that the majority of errors in reads to the same flash page appear at the same positions until thepage is erased. By caching detected errors, we can correct a significant portion of errors in the requested flash page prior to the LDPC decoding process. This design significantly reduces LDPC decoding overhead because the latency of LDPC is correlated with thenumber of errors in the input data. We conduct experiments, including flash characterization, LDPC simulation, and SSD simulation,to evaluate EC-Cache. The experimental results demonstrate that EC-Cache can improve the read performance of LDPC-based SSDs by up to $2.6\\times$ . |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/TC.2014.2345387 | IEEE Trans. Computers |
Keywords | DocType | Volume |
Ash,Decoding,Random access memory,Sensors,Iterative decoding,Flash memories | Journal | 65 |
Issue | ISSN | Citations |
4 | 0018-9340 | 8 |
PageRank | References | Authors |
0.48 | 26 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ren-Shuo Liu | 1 | 141 | 9.86 |
| Meng-Yen Chuang | 2 | 18 | 0.97 |
| Chia-Lin Yang | 3 | 1033 | 76.39 |
| Cheng-Hsuan Li | 4 | 249 | 14.35 |
| Kin-Chu Ho | 5 | 50 | 2.90 |
| Hsiang-Pang Li | 6 | 123 | 9.54 |