Name
Abstract | ||
|---|---|---|
Impact of backside thinning damages and topside device structures on the elastic stress distributions in ultra-thinned Si substrates were studied using µ-Raman spectroscopy and TEM observations. The compressive and tensile stresses due to the backside damages and the top-side device structures, respectively, are in equilibrium. The variations in elastic stress depend on the topside device structures such as shallow trench isolations (STIs) and memory-cell transistors, and to a lesser extent on the backside damages. Even for DRAM samples thinner than 4 microns, the elastic deformations underneath STIs and memory-cell transistors areas are considered to be no leakage current degradations, because the relation between retention time and pass rate shows little difference before and after thinning. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/3DIC.2015.7334558 | 2015 International 3D Systems Integration Conference (3DIC) |
Keywords | Field | DocType |
3D integration,wafer thinning,back grinding,subsurface damage,Raman spectroscopy,TEM,DRAM | Dram,Wafer,Composite material,Micrometre,Leakage (electronics),Trench,Ultimate tensile strength,Transistor,Materials science,Elasticity (economics),Structural engineering | Conference |
ISSN | Citations | PageRank |
2164-0157 | 0 | 0.34 |
References | Authors | |
2 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tomoji Nakamura | 1 | 3 | 2.07 |
| Yoriko Mizushima | 2 | 5 | 2.31 |
| Young-Suk Kim | 3 | 13 | 3.58 |
| Ryuichi Sugie | 4 | 0 | 0.68 |
| Takayuki Ohba | 5 | 4 | 1.83 |