Name
Abstract | ||
|---|---|---|
Spintronic devices, such as magnetic tunnel junction (MTJ), are under intense investigation to overcome the increasing power issues of modern computing system, especially as technology node scales below 45 nm. MTJ is one of the most promising candidates for the next generation memory and logic chips thanks to its non-volatility, fast access speed, high endurance and easy 3-D integration with CMOS technology. In order to build a high-performance magnetic processor, this paper proposes a new design of magnetic full-adder (MFA) whose input signals are all stored in non-volatile states. Input data Q is stored in MTJs that are embedded in the MFA, while input data A and B are stored in two voltage sensing 2T/2MTJ cells. By using an industrial CMOS 28 nm design kit and a MTJ compact model, we validate this MFA and confirm its merits of high robustness, high speed and low power consumption. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/NANOARCH.2015.7180582 | Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH´15) |
Keywords | Field | DocType |
magnetic tunnel junction,3-D integration,magnetic full-adder,high reliability,voltage sensing | Adder,Computer science,Voltage,Spintronics,Electronic engineering,Robustness (computer science),CMOS,Tunnel magnetoresistance,Electrical engineering,Computing systems,AND gate | Conference |
ISSN | Citations | PageRank |
2327-8218 | 0 | 0.34 |
References | Authors | |
10 | 7 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Erya Deng | 1 | 57 | 7.33 |
| You Wang | 2 | 29 | 9.66 |
| Zhaohao Wang | 3 | 8 | 2.25 |
| Jacques-Olivier Klein | 4 | 461 | 46.64 |
| bernard dieny | 5 | 2 | 2.11 |
| Guillaume Prenat | 6 | 80 | 13.62 |
| Weisheng Zhao | 7 | 730 | 105.43 |