Name
Title | ||
|---|---|---|
Optimized stacking order for 3D-stacked ICs considering the probability and cost of failed bonding |
Abstract | ||
|---|---|---|
One notable difference between 3D test flow and 2D test flow mainly lies in the mid-bond test, in which the stacking yield can be further enhanced through optimized bonding arrangement. In contrast to the existing sequential stacking, this paper proposes a novel rearranged stacking scheme which estimates the probability and cost of failed bonding in each stacking step and optimizes the mid-bond order to screen out the failed component as early as possible. The effect of the rearranged stacking has been extensively analyzed using the yield model and cost model of 3D-SICs considering different process parameters such as die yield, stacking size, failure rate and redundancy degree of TSVs. Experimental results demonstrate that the proposed rearranged stacking method is only a half of the sequential stacking in terms of failed area ratio (FAR). |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/VLSI-DAT.2014.6834877 | VLSI-DAT |
Field | DocType | Citations |
Computer science,Algorithm,Failure rate,Electronic engineering,Redundancy (engineering),Stacking,Structural engineering | Conference | 0 |
PageRank | References | Authors |
0.34 | 8 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chang Hao | 1 | 11 | 1.64 |
| Huaguo Liang | 2 | 216 | 33.27 |
| Yang Li | 3 | 37 | 2.46 |
| Yiming Ouyang | 4 | 18 | 7.51 |