Abstract | ||
---|---|---|
This work proposes an area-efficient approach to fully exploit redundancy in reconfigurable sense amplifiers (SAs). The proposed SA can combine/invert offsets of sub-unit SAs, reducing offset by up to 3.1x at iso-area in 28nm FDSOI. |
Year | Venue | Field |
---|---|---|
2015 | Symposium on VLSI Circuits-Digest of Papers | Sense amplifier,Capacitor,Computer science,Exploit,Electronic engineering,CMOS,Redundancy (engineering),Transistor,Electrical engineering,Offset (computer science),Amplifier |
DocType | Citations | PageRank |
Conference | 0 | 0.34 |
References | Authors | |
0 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Mahmood Khayatzadeh | 1 | 49 | 3.53 |
Fabio Frustaci | 2 | 129 | 17.55 |
David Blaauw | 3 | 8916 | 823.47 |
Dennis Sylvester | 4 | 5295 | 535.53 |
Massimo Alioto | 5 | 706 | 88.98 |