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WEIDONG KUANG
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Name
Affiliation
Papers
WEIDONG KUANG
Department of Electrical Engineering, Pan American University, Edinburg, TX
11
Collaborators
Citations
PageRank
24
70
6.95
Referers
Referees
References
188
191
93
Search Limit
100
191
Publications (11 rows)
Collaborators (24 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Ultra-Robust Null Convention Logic Circuit with Emerging Domain Wall Devices.
2
0.40
2016
Correction and Comment on "An Adaptive Resolution Asynchronous ADC Architecture for Data Compression in Energy Constrained Sensing Applications".
2
0.37
2013
Design of Asynchronous Circuits on FPGAs for Soft Error Tolerance
1
0.41
2011
Design of Sequential Elements for Low Power Clocking System
10
0.79
2011
Design of asynchronous circuits for high soft error tolerance in deep submicrometer CMOS circuits
13
0.85
2010
Low-Power Clocked-Pseudo-NMOS Flip-Flop for Level Conversion in Dual Supply Systems
12
0.84
2009
PMOS breakdown effects on digital circuits – Modeling and analysis
1
0.37
2008
Soft Error Hardening for Asynchronous Circuits
5
0.47
2007
A Low Power Domino with Differential-Controlled-Keeper
4
0.43
2007
Low-Power Clock Branch Sharing Double-Edge Triggered Flip-Flop
14
1.12
2007
Teaching asynchronous design in digital integrated circuits
6
0.88
2004
1