Abstract | ||
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The trade-off between coarse- and fine-grained locking is a well understood issue in operating systems. Coarse-grained locking provides lower overhead under low contention, fine-grained locking provides higher scalability under contention, though at the expense of implementation complexity and re- duced best-case performance. revisit this trade-off in the context of microkernels and tightly-coupled cores with shared caches and low inter-core migration latencies. We evaluate performance on two architectures: x86 and ARM MPCore, in the former case also utilising transactional memory (Intel TSX). Our thesis is that on such hardware, a well-designed microkernel, with short system calls, can take advantage of coarse-grained locking on modern hardware, avoid the run-time and complexity cost of multiple locks, enable formal verification, and still achieve scalability comparable to fine-grained locking. |
Year | Venue | Field |
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2016 | arXiv: Operating Systems | x86,Computer science,Microkernel,Real-time computing,Transactional memory,Multi-core processor,Operating system,Formal verification,Scalability,Distributed computing |
DocType | Volume | Citations |
Journal | abs/1609.08372 | 1 |
PageRank | References | Authors |
0.35 | 5 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
K. Elphinstone | 1 | 1190 | 65.76 |
Amirreza Zarrabi | 2 | 15 | 2.26 |
Adrian Danis | 3 | 11 | 1.24 |
Yanyan Shen | 4 | 32 | 2.19 |
Gernot Heiser | 5 | 2525 | 137.42 |