Name
Affiliation
Papers
GERNOT HEISER
Open Kernel Labs and NICTA and University of New South Wales, Sydney, Australia
98
Collaborators
Citations 
PageRank 
140
2525
137.42
Referers 
Referees 
References 
5136
1967
1392
Search Limit
1001000
Title
Citations
PageRank
Year
Microarchitectural Timing Channels and their Prevention on an Open-Source 64-bit RISC-V Core.00.342021
Benchmarking Flaws Undermine Security Research.00.342020
seL4 in Australia: from research to real-world trustworthy systems00.342020
Towards Provable Timing-Channel Prevention00.342020
Can We Prove Time Protection?00.342019
Fault Tolerance Through Redundant Execution on COTS Multicores: Exploring Trade-Offs00.342019
SoK: Benchmarking Flaws in Systems Security10.352019
A Formal Approach to Constructing Secure Air Vehicle Software.40.572018
Formally verified software in the real world.40.432018
Roundtable: Machine Learning for Embedded Systems: Hype or Lasting Impact?00.342018
Benchmarking Crimes: An Emerging Threat in Systems Security.40.442018
For Safety's Sake: We Need a New Hardware-Software Contract!00.342018
Scheduling-context capabilities: a principled, light-weight operating-system mechanism for managing time40.392018
Time Protection: the Missing OS Abstraction.50.412018
A Survey of Microarchitectural Timing Attacks and Countermeasures on Contemporary Hardware.451.242018
The Cogent Case for Property-Based Testing.00.342017
Technical Perspective: Proving file systems meet expectations.00.342017
High-assurance timing analysis for a high-assurance real-time operating system.10.352017
L4 Microkernels: The Lessons from 20 Years of Research and Deployment.80.522016
Report on the Asia-Pacific Systems Workshop 2015 (APSys'15).00.342016
It's Time: OS Mechanisms for Enforcing Asymmetric Temporal Integrity.20.412016
An Evaluation of Coarse-Grained Locking for Multicore Microkernels.10.352016
Cogent: verifying high-assurance file system implementations190.742016
Do Hardware Cache Flushing Operations Actually Meet Our Expectations?00.342016
For a Microkernel, a Big Lock Is Fine30.402015
Last-Level Cache Side-Channel Attacks are Practical2235.342015
Mapping the Intel Last-Level Cache.140.802015
The Last Mile: An Empirical Study of Timing Channels on seL4280.932014
Unifying DVFS and offlining in mobile multicores180.822014
Comprehensive formal verification of an OS microkernel802.542014
Mobile multicores: use them or waste them140.682014
Trickle: Automated infeasible path detection using all minimal unsatisfiable subsets110.582014
File systems deserve verification too!100.542014
The systems hacker's guide to the galaxy energy usage in a modern smartphone391.492013
Sequoll: A framework for model checking binaries10.362013
The von Neumann architecture is due for retirement10.372013
RapiLog: reducing system complexity through verification70.492013
Code optimizations using formally verified properties10.352013
From L3 to seL4 what have we learnt in 20 years of L4 microkernels?421.272013
A Scalable Lock Manager for Multicores.110.572013
It's Time for Trustworthy Systems60.642012
Trustworthy Real-Time Systems.00.342012
Improving interrupt response time in a verifiable protected microkernel110.742012
To preempt or not to preempt, that is the question30.402012
Protected hard real-time: the next frontier30.402011
Hardware-supported virtualization on ARM371.812011
What if you could actually trust your kernel?60.492011
Timing Analysis of a Protected Operating System Kernel331.112011
Architecture optimisation with currawong10.482011
Improved device driver reliability through hardware verification reuse40.412011
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