Paper Info
Title
He-P2012: Performance and Energy Exploration of Architecturally Heterogeneous Many-Cores.
Abstract
The end of Dennardian scaling in advanced technologies brought about new architectural templates to overcome the so-called utilization wall and provide Moore's Law-like performance and energy scaling in embedded SoCs. One of the most promising templates, architectural heterogeneity, is hindered by high cost due to the design space explosion and the lack of effective exploration tools. Our work provides three contributions towards a scalable and effective methodology for design space exploration in embedded MC-SoCs. First, we present the He-P2012 architecture, augmenting the state-of-art STMicroelectronics P2012 platform with heterogeneous shared-L1 coprocessors called HW processing elements (HWPE). Second, we propose a novel methodology for the semi-automatic definition and instantiation of shared-memory HWPEs from a C source, supporting both simple and structured data types. Third, we demonstrate that the integration of HWPEs can provide significant performance and energy efficiency benefits on a set of benchmarks originally developed for the homogeneous P2012, achieving up to 123x speedup on the accelerated code region (~98 % of Amdahl's law limit) while saving 2/3 of the energy.
Year
DOI
Venue
2016
10.1007/s11265-015-1056-7
Signal Processing Systems
Keywords
Field
DocType
Many-core,Heterogeneity,HW acceleration,Exploration flow
Architecture,Computer science,Amdahl's law,Efficient energy use,Parallel computing,Real-time computing,Coprocessor,Design space exploration,Data model,Scalability,Speedup
Journal
Volume
Issue
ISSN
85
3
1939-8018
Citations 
PageRank 
References 
1
0.35
32
Authors
4
Name
Order
Citations
PageRank
Francesco Conti 0001112518.24
Andrea Marongiu233739.19
Chuck Pilkington321420.84
Luca Benini4131161188.49