Name
Abstract | ||
|---|---|---|
Debug time has become a major issue in post silicon debug because of the increasingly complicated nature of circuit design. However, reducing debug time is a major challenge because of the limited size of the trace buffer used to observe internal signals in the circuit. This study proposes an on-chip error detection method to overcome this challenge. The on-chip process detects the error-suspect window using the pre-calculated golden data stored in the trace buffer. This allows the selective compaction and capture of the debug data in the trace buffer during the error-containing interval. As a result, reducing the number of debug sessions significantly reduces the total debug time. The experimental results on various debug cases show significant reductions in total debug time compared to previous work. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/TC.2016.2561920 | IEEE Trans. Computers |
Keywords | Field | DocType |
System-on-chip,Compaction,Real-time systems,Integrated circuit modeling,Silicon,Buffer storage,Data models | Data modeling,System on a chip,Computer science,Parallel computing,Circuit design,Background debug mode interface,Error detection and correction,Real-time computing,Silicon debug,Trace buffer,Debugging,Embedded system | Journal |
Volume | Issue | ISSN |
66 | 1 | 0018-9340 |
Citations | PageRank | References |
1 | 0.35 | 12 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hyunggoy Oh | 1 | 14 | 4.80 |
| Taewoo Han | 2 | 79 | 8.41 |
| Inhyuk Choi | 3 | 15 | 4.75 |
| Sungho Kang | 4 | 436 | 78.44 |