Name
Title | ||
|---|---|---|
A 250-Mb/s to 6-Gb/s Referenceless Clock and Data Recovery Circuit With Clock Frequency Multiplier. |
Abstract | ||
|---|---|---|
This brief describes the design and implementation of a 250-Mb/s to 6-Gb/s single-loop referenceless clock and data recovery circuit. The clock frequency multiplier and the referenceless frequency acquisition circuit are used to cover a wide-range data rate. The clock frequency multiplier is proposed to generate the 6-GHz clock with low jitter. In addition, the voltage-controlled oscillator operat... |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/TCSII.2015.2503721 | IEEE Transactions on Circuits and Systems II: Express Briefs |
Keywords | Field | DocType |
Clocks,Voltage-controlled oscillators,Capacitors,Jitter,Phase frequency detector,Delays,Power dissipation | Clock signal,Clock gating,Clock domain crossing,Electronic engineering,Clock skew,Digital clock manager,Jitter,CPU multiplier,Mathematics,Clock rate | Journal |
Volume | Issue | ISSN |
64 | 6 | 1549-7747 |
Citations | PageRank | References |
1 | 0.36 | 3 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ja-young Kim | 1 | 56 | 10.72 |
| Junyoung Song | 2 | 40 | 11.42 |
| Jungtaek You | 3 | 1 | 0.70 |
| Sewook Hwang | 4 | 41 | 10.43 |
| Sang-Geun Bae | 5 | 7 | 3.29 |
| Chulwoo Kim | 6 | 397 | 74.58 |