Title
A 1.02nW PMOS-only, trim-free current reference with 282ppm/°C from −40°C to 120°C and 1.6% within-wafer inaccuracy
Abstract
A 1.02nW current reference is designed with only PMOS transistors, thereby providing inherently low process variation and enabling trim-free operation. Thirty-two measured chips from 5 corner wafers in 180nm CMOS technology show an untrimmed within-wafer spread (σ/μ) of 1.6% and across-corner wafer-to-wafer spread of ±4.7%. The measured average temperature coefficient is 282ppm/°C from -40°C to 120°C while generating a 35nA reference current. Total untrimmed uncertainty due to variations of process, voltage, and temperature is about 8.8%.
Year
DOI
Venue
2017
10.1109/ESSCIRC.2017.8094515
ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference
Keywords
Field
DocType
within-wafer inaccuracy,PMOS transistors,within-wafer spread,trim-free current reference,CMOS technology,corner wafers,across-corner wafer-to-wafer spread,power 1.02 nW,size 180.0 nm,current 35.0 nA,temperature -40.0 degC to 120.0 degC
Wafer,Computer science,Voltage,Temperature coefficient,CMOS,Electronic engineering,Process variation,Transistor,MOSFET,PMOS logic
Conference
ISBN
Citations 
PageRank 
978-1-5090-5026-0
0
0.34
References 
Authors
8
5
Name
Order
Citations
PageRank
Qing Dong19512.29
Inhee Lee227533.89
Kuiyuan Yang314820.89
David Blaauw48916823.47
Dennis Sylvester55295535.53