Abstract | ||
---|---|---|
This article presents an ultra-low-power parallel computing platform and its system-on-chip (SoC) embodiment, targeting a wide range of emerging near-sensor processing tasks for Internet of Things (IoT) applications. The proposed SoC achieves 193 million operations per second (MOPS) per mW at 162 MOPS (32 bits), improving the first-generation Parallel Ultra-Low-Power (PULP) architecture by 6.4 and... |
Year | DOI | Venue |
---|---|---|
2017 | 10.1109/MM.2017.3711645 | IEEE Micro |
Keywords | Field | DocType |
Random access memory,Energy efficiency,Memory management,System-on-chip,Low power electronics,Reduced instruction set computing,Power system management | Power management,System on a chip,Efficient energy use,Computer science,Internet of Things,Parallel computing,Parallel processing,Reduced instruction set computing,Memory management,Computer hardware,Low-power electronics | Journal |
Volume | Issue | ISSN |
37 | 5 | 0272-1732 |
Citations | PageRank | References |
5 | 0.55 | 0 |
Authors | ||
13 |
Name | Order | Citations | PageRank |
---|---|---|---|
Davide Rossi | 1 | 416 | 47.47 |
Antonio Pullini | 2 | 390 | 28.27 |
Igor Loi | 3 | 445 | 30.66 |
Michael Gautschi | 4 | 113 | 10.19 |
Frank K. Gurkaynak | 5 | 69 | 7.91 |
Adam Teman | 6 | 129 | 19.12 |
Jeremy Constantin | 7 | 40 | 4.86 |
A. Burg | 8 | 1426 | 126.54 |
Ivan Miro-Panades | 9 | 86 | 6.16 |
Edith Beigne | 10 | 536 | 52.54 |
Fabien Clermidy | 11 | 797 | 61.56 |
Philippe Flatresse | 12 | 97 | 15.35 |
Luca Benini | 13 | 13116 | 1188.49 |