Title
Low-power implementation of Mitchell's approximate logarithmic multiplication for convolutional neural networks.
Abstract
This paper proposes a low-power implementation of the approximate logarithmic multiplier to improve the power consumption of convolutional neural networks for image classification, taking advantage of its intrinsic tolerance to error. The approximate logarithmic multiplier converts multiplications to additions by taking approximate logarithm and achieves significant improvement in power and area while having low worst-case error, which makes it suitable for neural network computation. Our proposed design shows a significant improvement in terms of power and area over the previous work that applied logarithmic multiplication to neural networks, reducing power up to 76.6% compared to exact fixed-point multiplication, while maintaining comparable prediction accuracy in convolutional neural networks for MNIST and CIFAR10 datasets.
Year
Venue
Keywords
2018
ASP-DAC
Approximate Multiplier, Convolutional Neural Networks, Logarithm, Power Reduction, MNIST, CIFAR-10
Field
DocType
ISSN
MNIST database,Convolutional neural network,Computer science,Algorithm,Multiplier (economics),Electronic engineering,Multiplication,Logarithm,Contextual image classification,Artificial neural network,Computation
Conference
2153-6961
Citations 
PageRank 
References 
0
0.34
12
Authors
4
Name
Order
Citations
PageRank
MIN SOO KIM18216.71
Alberto A. Del Barrio27814.49
Román Hermida38915.34
Nader Bagherzadeh41674182.54