Paper Info
Title
A Portable Class Of 3-Transistor Current References With Low-Power Sub-0.5v Operation
Abstract
This work proposes a new class of current references based on only 3 transistors that allows sub-0.5V operation. The circuit consists of a 2-transistor block that generates a proportional-to-absolute-temperature or a complementary-to-absolute-temperature voltage and a load transistor. The idea of a 3T current reference is validated by circuit simulations for different complementary metal-oxide-semiconductor technologies and by experimental measurements on a large set of test chips fabricated with a commercial 0.18m complementary metal-oxide-semiconductor process. As compared to the state-of-art competitors, the 3T current reference exhibits competitive performance in terms of temperature coefficient (578ppm/degrees C), line sensitivity (3.9%/V), and power consumption (213nW) and presents a reduction by a factor of 2 to 3 in terms of minimum operating voltage (0.45V) and an improvement of 1 to 2 orders of magnitude in terms of area occupation (750m(2)). In spite of the extremely reduced silicon area, the fabricated chips exhibit low-process sensitivity (2.7%). A digital trimming solution to significantly reduce the process sensitivity is also presented and validated by simulations.
Year
DOI
Venue
2018
10.1002/cta.2439
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
Keywords
Field
DocType
CMOS analog design, current reference, Internet of things (IoT), low-power, low-voltage
Internet of Things,Electronic engineering,Low voltage,Transistor,Mathematics
Journal
Volume
Issue
ISSN
46
4
0098-9886
Citations 
PageRank 
References 
1
0.35
8
Authors
6
Name
Order
Citations
PageRank
Felice Crupi1258.33
Raffaele De Rose25710.63
Maksym Paliy310.35
Marco Lanuzza420328.64
Mattia Perna510.35
Giuseppe Iannaccone615224.49