Name
Abstract | ||
|---|---|---|
Power-on self-test is an efficient means for covering safety-critical faults in automotive systems. This paper presents a multicycle logic BIST technique that avoids fault masking after multiple cycles by sequential observation using a new scan cell structure. -Hans-Joachim Wunderlich, Universität Stuttgart |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/MDAT.2018.2799801 | IEEE Design & Test |
Keywords | Field | DocType |
Circuit faults,Logic gates,Automotive engineering,Design for testability,Vehicle safety,Discrete Fourier transforms,Fault detection | Design for testing,Logic gate,Functional safety,Fault detection and isolation,Computer science,Automotive systems,Cell structure,Wunderlich,Computer engineering,Reliability engineering,Automotive industry | Journal |
Volume | Issue | ISSN |
35 | 3 | 2168-2356 |
Citations | PageRank | References |
1 | 0.38 | 0 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Senling Wang | 1 | 18 | 5.91 |
| Yoshinobu Higami | 2 | 140 | 27.24 |
| Hiroshi Takahashi | 3 | 148 | 24.32 |
| Hiroyuki Iwata | 4 | 7 | 2.92 |
| Jun Matsushima | 5 | 13 | 4.09 |