Name
Abstract | ||
|---|---|---|
In nanometer technologies, circuits are more and more sensitive to various kinds of perturbations. Alpha particles and atmospheric neutrons are affecting storage elements as well as the combinational logic. In the past, the major efforts were related on memories. However, as the whole situation is getting worse, solutions that protect the entire design are mandatory. Solutions for detecting the error in logic functions already exist, but there are only few of them that allow the correction, leading to a lot of hardware overhead in non-processor design. In this paper, we present a novel hardware architecture that reduces the cost of rollback in any kinds of circuit. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/LASCAS.2017.7948093 | 2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS) |
Keywords | Field | DocType |
Error correction,fault tolerance,soft error,rollback | Pipeline transport,Computer science,Electronic engineering,Combinational logic,Fault tolerance,Register-transfer level,Electronic circuit,Rollback,Very-large-scale integration,Hardware architecture,Embedded system | Conference |
ISBN | Citations | PageRank |
978-1-5090-5860-0 | 0 | 0.34 |
References | Authors | |
4 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Thierry Bonnoit | 1 | 6 | 2.27 |
| Nacer-Eddine Zergainoh | 2 | 129 | 19.39 |
| Michael Nicolaidis | 3 | 996 | 129.91 |
| Raoul Velazco | 4 | 124 | 19.48 |