Name
Abstract | ||
|---|---|---|
A power-efficient pipeline analog-to-digital converter (ADC) architecture employing a current-mode (CM) multiplying digital-to-analog converter (MDAC) is implemented in this paper. A linear operational transconductance amplifier (OTA), a current steering DAC, and a transimpedance amplifier (TIA) work together as an error amplifier to implement the first stage of the pipeline ADC. The high output i... |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/JSSC.2018.2863959 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Pipelines,Gain,Computer architecture,Capacitors,Switches,Calibration,Capacitance | Electrical efficiency,Output impedance,Computer science,Operational transconductance amplifier,Spurious-free dynamic range,Figure of merit,Electronic engineering,CMOS,Transimpedance amplifier,Amplifier | Journal |
Volume | Issue | ISSN |
53 | 11 | 0018-9200 |
Citations | PageRank | References |
1 | 0.40 | 0 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Carlos Briseno-Vidrios | 1 | 5 | 3.31 |
| Dadian Zhou | 2 | 2 | 1.10 |
| Prakash, S. | 3 | 1 | 2.09 |
| Qiyuan Liu | 4 | 9 | 3.05 |
| Alexander Edward | 5 | 1 | 0.40 |
| Eric Soenen | 6 | 29 | 7.15 |
| Martin Kinyua | 7 | 16 | 4.11 |
| Jose Silva-Martinez | 8 | 630 | 86.56 |