Title
HARPA: Tackling physically induced performance variability.
Abstract
Continuously increasing application demands on both High Performance Computing (HPC) and Embedded Systems (ES) are driving the IC manufacturing industry on an ever-lasting scaling of devices in silicon. Nevertheless, integration and miniaturization of transistors comes with an important and non-negligible trade-off: time-zero and time-dependent performance variability. Increasing guard-bands to battle variability is not scalable, since worst-case design margins are prohibitive for downscaled technology nodes. This paper discusses the FP7-612069-HARPA project of the European Commission which aims to enable next-generation embedded and high-performance heterogeneous many-cores to cost-effectively confront variations by providing Dependable-Performance: correct functionality and timing guarantees throughout the expected lifetime of a platform under thermal, power, and energy constraints. The HARPA novelty is in seeking synergies in techniques that have been considered virtually exclusively in the ES or HPC domains (worst-case guaranteed partly proactive techniques in embedded, and dynamic best-effort reactive techniques in high-performance).
Year
DOI
Venue
2017
10.23919/DATE.2017.7926965
DATE
Keywords
Field
DocType
HARPA,high-performance computing,IC manufacturing industry,embedded systems,FP7-612069-HARPA project,European Commission,energy constraints,thermal constraints,power constraints,HPC domains,ES domains
Ic manufacturing,Supercomputer,Computer science,Real-time computing,Novelty,Scalability,Embedded system
Conference
ISSN
ISBN
Citations 
1530-1591
978-1-5090-5826-6
0
PageRank 
References 
Authors
0.34
14
20