Paper Info
Title
Session 18 overview: Adaptive circuits and digital regulators: Digital circuit techniques subcommittee.
Abstract
This session focuses on circuits that detect and adapt to various types of process-voltage-temperature-aging (PVTA) variations, along with the latest progress in digital low-dropout (LDO) voltage regulators. The presented adaptive circuits demonstrate rapid and accurate voltage-droop detection to perform instruction throttling, clock period stretching via use of a critical-path replica within the phase-locked loop (PLL) and (buck) voltage regulator, and closed-loop continuous-body-bias for temperature, process, and aging compensation. There are five digital LDO papers that introduce a range of new techniques, such as an analog-assisted NMOS power transistor, a beat-frequency-based adaptive-sampling scheme, and the replacement of traditional power-transistor devices with a switched-capacitor resistor. These papers also describe a distributed LDO array that improves IR drop and response time, as well as an LDO that is designed to minimize pass-through of voltage ripple from a preceding switching regulator.
Year
Venue
Field
2018
ISSCC
Phase-locked loop,Digital electronics,Power network design,NMOS logic,Computer science,Electronic engineering,Resistor,Electronic circuit,Electrical engineering,Voltage regulator,Switched-mode power supply
DocType
Citations 
PageRank 
Conference
0
0.34
References 
Authors
0
3
Name
Order
Citations
PageRank
Dennis Sylvester15295535.53
K. Hirairi271.39
Edith Beigne353652.54