Name
Abstract | ||
|---|---|---|
Approximate addition is a technique to trade off energy consumption and output quality in error-tolerant applications. In prior art, bit truncation has been explored as a lever to dynamically trade off energy and quality. In this brief, an innovative bit truncation strategy is proposed to achieve more graceful quality degradation compared to state-of-the-art truncation schemes. This translates into energy reduction at a given quality target. When applied to a ripple-carry adder, the proposed bit truncation approach improves quality by up to 8.5 dB in terms of peak signal-to-noise ratio, compared to traditional bit truncation. As a case study, the proposed approach was applied to a discrete cosine transform engine. In comparison with prior art, the proposed approach reduces energy by 20%, at insignificant delay and silicon area overhead. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/TVLSI.2018.2881326 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Adaptive precision,approximate computing,energy-quality scaling,error-tolerant systems,low-power design,VLSI | Truncation,Energy quality,Adder,Computer science,Lever,Discrete cosine transform,Electronic engineering,Very-large-scale integration,Energy consumption,Scalability | Journal |
Volume | Issue | ISSN |
27 | 4 | 1063-8210 |
Citations | PageRank | References |
1 | 0.35 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Fabio Frustaci | 1 | 129 | 17.55 |
| Stefania Perri | 2 | 264 | 33.11 |
| Pasquale Corsonello | 3 | 278 | 38.06 |
| Massimo Alioto | 4 | 706 | 88.98 |