Paper Info
Title
Unified Analysis, Modeling, and Simulation of Chopping Artifacts in Continuous-Time Delta-Sigma Modulators
Abstract
Chopping is an efficient way of mitigating the effect of flicker noise in continuous-time delta-sigma modulators (CT <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\Delta \Sigma }$ </tex-math></inline-formula> Ms). Unfortunately, chopping causes the demodulation of shaped quantization noise into the signal band. Prior works have analyzed noise-folding effects in chopped integrators that use single-stage and two-stage feedforward-compensated OTAs. These works use restrictive assumptions, such as settling of the OTA internal nodes at the chopping instants, and an NRZ feedback DAC waveform. This paper gives a general model for aliasing of shaped noise in a chopped integrator that incorporates arbitrary OTAs, arbitrary DAC pulse-shapes, and incomplete settling. Using the theory of linear periodically time-varying (LPTV) systems, we derive a simple simulation test-bench that can be used to estimate the parameters of our model. Thanks to this, the effects on chopping on the performance of the modulator can be rapidly estimated without running long transient simulations. Simulation and experimental results that support our theory are given.
Year
DOI
Venue
2019
10.1109/tcsi.2019.2907167
IEEE Transactions on Circuits and Systems I-regular Papers
Keywords
Field
DocType
Modulation,Analytical models,Bandwidth,Optical signal processing,Integrated circuit modeling,Transient analysis,Shape
Demodulation,Flicker noise,Control theory,Modeling and simulation,Waveform,Integrator,Delta-sigma modulation,Aliasing,Quantization (signal processing),Mathematics
Journal
Volume
Issue
ISSN
66
8
1549-8328
Citations 
PageRank 
References 
3
0.42
0
Authors
2
Name
Order
Citations
PageRank
Raviteja Theertham182.29
Shanthi Pavan239187.81