Title
Layout-Based Dual-Cell-Aware Tests
Abstract
Conventional fault models define their faulty behavior at the IO ports of standard cells with simple rules of fault activation and fault propagation. However, there still exist some defects inside a cell (intra-cell) or between two cells (dual-cell) that cannot be effectively detected by the test patterns of conventional fault models and hence become a source of DPPM. In order to further increase the defect coverage, many research works have been conducted to study the fault models resulting from different types of intra-cell and dual-cell defects, by SPICE-simulating each targeted defect with its equivalent circuit-level defect model. However, it was considered computationally infeasible to simulate every possible defective scenario for a cell library and obtain a complete set of cell-level fault models. In this paper, we present a new dual-cell-aware (DCA) framework based on examining the layout of two adjacent cells (i.e., a dual cell) to identify potential defects, where time-consuming RC extraction can be avoided and the runtime for SPICE simulation can be reduced. Experimental results and silicon data on a SoC product show that the proposed DCA framework can not only save runtime significantly but also maintain the promising efficacy of DCA tests for the objective of lowering DPPM.
Year
DOI
Venue
2019
10.1109/VTS.2019.8758646
2019 IEEE 37th VLSI Test Symposium (VTS)
Keywords
DocType
ISSN
dual-cell-aware tests,standard cells,fault activation,fault propagation,test patterns,defect coverage,dual-cell defects,equivalent circuit-level defect model,cell library,cell-level fault models,dual-cell-aware framework,adjacent cells,SPICE simulation,DCA tests
Conference
1093-0167
ISBN
Citations 
PageRank 
978-1-7281-1171-1
0
0.34
References 
Authors
6
10
Name
Order
Citations
PageRank
Tse-Wei Wu100.34
Dong-Zhen Lee200.34
Yu-Hao Huang310.70
Mango C.-T. Chao4487.38
Kai-Chiang Wu511313.98
Shu-Yi Kao621.40
Ying-Yen Chen721.74
Po-Lin Chen810.71
Mason Chern921.40
Jih-Nung Lee10143.13