Name
Title | ||
|---|---|---|
Phase-Aware Cache Partitioning to Target Both Turnaround Time and System Performance. |
Abstract | ||
|---|---|---|
The Last Level Cache (LLC) plays a key role in the system performance of current multi-cores by reducing the number of long latency main memory accesses. The inter-application interference at this shared resource, however, can lead the system to undesired situations regarding performance and fairness. Recent approaches have successfully addressed fairness and turnaround time (TT) in commercial pro... |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1109/TPDS.2020.2996031 | IEEE Transactions on Parallel and Distributed Systems |
Keywords | DocType | Volume |
System performance,Interference,Throughput,Measurement,Heuristic algorithms,Program processors,Multicore processing | Journal | 31 |
Issue | ISSN | Citations |
11 | 1045-9219 | 1 |
PageRank | References | Authors |
0.35 | 0 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Lucia Pons | 1 | 1 | 1.37 |
| Julio Sahuquillo | 2 | 420 | 53.71 |
| Vicent Selfa | 3 | 6 | 3.86 |
| Salvador Petit | 4 | 153 | 27.28 |
| Julio Pons | 5 | 1 | 0.69 |