Title
Cross-layer Design for Computing-in-Memory: From Devices, Circuits, to Architectures and Applications
Abstract
ABSTRACTThe era of Big Data, Artificial Intelligence (AI) and Internet of Things (IoT) is approaching, but our underlying computing infrastructures are not sufficiently ready. The end of Moore's law and process scaling as well as the memory wall associated with von Neumann architectures have throttled the rapid development of conventional architectures based on CMOS technology, and cross-layer efforts that involve the interactions from low-end devices to high-end applications have been prominently studied to overcome the aforementioned challenges. On one hand, various emerging devices, e.g., Ferroelectric FET, have been proposed to either sustain the scaling trends or enable novel circuit and architecture innovations. On the other hand, novel computing architectures/algorithms, e.g., computing-in-memory (CiM), have been proposed to address the challenges faced by conventional von Neumann architectures. Naturally, integrated approaches across the emerging devices and computing architectures/algorithms for data-intensive applications are of great interests. This paper uses the FeFET as a representative device, and discuss about the challenges, opportunities and contributions for the emerging trends of cross-layer co-design for CiM.
Year
DOI
Venue
2021
10.1145/3394885.3431617
ASPDAC
Keywords
DocType
ISSN
Ferroelectric, cross-layer design, content addressable memory
Conference
2153-6961
Citations 
PageRank 
References 
0
0.34
0
Authors
8
Name
Order
Citations
PageRank
Hussam Amrouch125150.22
Xiaobo Sharon Hu222.07
Mohsen Imani334148.13
Ann Franchesca Laguna453.46
Michael Niemier519131.85
Simon Thomann652.20
Xunzhao Yin7136.33
Cheng Zhuo823928.01