Name
Abstract | ||
|---|---|---|
We present a novel cache compression method that leverages the fine-grained data duplication across cache lines. We leverage the XOR operation of the in-SRAM bit-line computing peripherals, to search for compressible data over a wide range of data locations on cache, reducing the data movement requirements. To reduce the decompression latency, we design specialized compression schemes by fetching ... |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/NAS51552.2021.9605440 | 2021 IEEE International Conference on Networking, Architecture and Storage (NAS) |
Keywords | DocType | ISBN |
Conferences,Computer architecture,Benchmark testing,Parallel processing,Arrays | Conference | 978-1-7281-7744-1 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xiao-Wei Wang | 1 | 596 | 59.78 |
| Charles Augustine | 2 | 55 | 5.90 |
| Eriko Nurvitadhi | 3 | 399 | 33.08 |
| Ravishankar K. Iyer | 4 | 1119 | 75.72 |
| Li Zhao | 5 | 3 | 0.78 |
| Reetuparna Das | 6 | 1117 | 47.07 |