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S. M. YASSER SHERAZI
Author Info
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Name
Affiliation
Papers
S. M. YASSER SHERAZI
Lund Univ, Elect & Informat Technol Dept, S-22100 Lund, Sweden
8
Collaborators
Citations
PageRank
21
12
3.29
Referers
Referees
References
25
81
34
Publications (8 rows)
Collaborators (21 rows)
Referers (25 rows)
Referees (81 rows)
Title
Citations
PageRank
Year
Low Power Analog and Digital (7,5) Convolutional Decoders in 65 nm CMOS
1
0.35
2015
A digital baseband for low power FSK based receiver in 65 nm CMOS
0
0.34
2014
Ultra low power transceivers for wireless sensors and body area networks
1
0.36
2014
Ultra low energy design exploration of digital decimation filters in 65 nm dual-VT CMOS in the sub-VT domain.
3
0.60
2013
A Receiver Architecture for Devices in Wireless Body Area Networks
5
0.45
2012
Design exploration of a 65 nm Sub-VT CMOS digital decimation filter chain
2
0.52
2011
Impact of switching activity on the energy minimum voltage for 65 nm sub-VT CMOS.
0
0.34
2011
Benchmarking of Standard-Cell Based Memories in the Sub- VT Domain in 65-nm CMOS Technology.
0
0.34
2011
1