Calvin Plett - Citegraph

Author Info

Name	Affiliation	Papers
CALVIN PLETT	Carleton Univ, Dept Elect, Ottawa, ON K1S 5B6, Canada	26
Collaborators	Citations	PageRank
47	134	20.84
Referers	Referees	References
384	194	75

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100384

Publications (26 rows)

Collaborators (47 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
New Charge-Steering DFEs in 55-nm CMOS	0	0.34	2021
On-Chip Automatic LC Tuner for RFID Tags Based on Negative Resistances.	0	0.34	2018
Reduced-Size On-Wafer Inductors using Slow Wave Techniques	0	0.34	2018
A 0.009–1.4-GHz Frequency Synthesizer With Suppressed Transients During VCO Band Switching	0	0.34	2015
Analysis and Modeling of the Phase Detector Hysteresis in Bang-Bang PLLs	3	0.43	2015
A Switchless Multiband Impedance Matching Technique Based on Multiresonant Circuits.	0	0.34	2013
A 40 Gb/s transimpedance amplifier in 65 nm CMOS	8	0.78	2010
A low power DC-DC converter for scavenged power wireless sensor networks	0	0.34	2010
Low-power CMOS transceivers with on-chip antennas for short-range radio-frequency communication	0	0.34	2009
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, SBCCI 2009, Natal, Brazil, August 31 - September 03, 2009	54	4.44	2009
Design and Characterization of a 5.2 GHz/2.4 GHz Fractional- Frequency Synthesizer for Low-Phase Noise Performance	1	0.45	2006
A 0.13 Mu M Cmos Delay Cell For 40 Gb/S Ffe Equalization	0	0.34	2006
A 0.18-<tex>$muhbox m$</tex>CMOS Analog Min-Sum Iterative Decoder for a (32,8) Low-Density Parity-Check (LDPC) Code	27	1.62	2006
Silicon Differential Antenna/Inductor For Short Range Wireless Communication Applications	2	0.60	2006
Using MEMS capacitive switches in tunable RF amplifiers	0	0.34	2006
A High-Speed Analog Min-Sum Iterative Decoder	0	0.34	2005
Physical resource binding for a Coarse-Grain reconfigurable array using evolutionary algorithms	0	0.34	2005
Physical Resource Binding for a Coarse Grain Reconfigurable Array	1	0.36	2004
Gain bandwidth considerations in fully integrated distributed amplifiers implemented in silicon	1	0.48	2004
RF Circuit Implications of Moderate Inversion Enhanced Linear Region in MOSFETs	34	4.50	2004
A 5 GHz direct-conversion receiver with DC offset correction	0	0.34	2004
A receive path ΔΣ frequency to digital converter	0	0.34	2000
6.5 mW CMOS low noise amplifier at 1.9 GHz	0	0.34	1999
A Sigma-Delta Frequency Discriminator Based Synthesizer	1	0.42	1995
Bit-Error Rate Measurements For A High Frequency Interpolated Frequency-Hopping Spread-Spectrum System	0	0.34	1995
Self-tuned continuous-time notch filters	2	1.69	1994