Name
Affiliation
Papers
MEHDI KAMAL
University of Tehran
75
Collaborators
Citations 
PageRank 
72
189
30.41
Referers 
Referees 
References 
464
1035
586
Search Limit
1001000
Title
Citations
PageRank
Year
Distributing DNN training over IoT edge devices based on transfer learning00.342022
LATIM: Loading-Aware Offline Training Method for Inverter-Based Memristive Neural Networks10.362021
OPTIMA: An Approach for Online Management of Cache Approximation Levels in Approximate Processing Systems00.342021
An Energy-Efficient Inference Method in Convolutional Neural Networks Based on Dynamic Adjustment of the Pruning Level00.342021
Loading-Aware Reliability Improvement of Ultra-Low Power Memristive Neural Networks00.342021
Reliability Enhancement of Inverter-Based Memristor Crossbar Neural Networks Using Mathematical Analysis of Circuit Non-Idealities10.372021
DART: A Framework for Determining Approximation Levels in an Approximable Memory Hierarchy00.342020
Low-power Accuracy-configurable Carry Look-ahead Adder Based on Voltage Overscaling Technique00.342020
EGAN: A Framework for Exploring the Accuracy vs. Energy Efficiency Trade-off in Hardware Implementation of Error Resilient Applications10.372020
Res-DNN: A Residue Number System-Based DNN Accelerator Unit50.452020
Design Exploration of Energy-Efficient Accuracy-Configurable Dadda Multipliers With Improved Lifetime Based on Voltage Overscaling10.352020
Offline Training Improvement Of Inverter-Based Memristive Neural Networks Using Inverter Voltage Characteristic Smoothing00.342020
Self-Adjusting Monitor for Measuring Aging Rate and Advancement20.512020
X-CGRA: An Energy-Efficient Approximate Coarse-Grained Reconfigurable Architecture20.422020
Block-Based Carry Speculative Approximate Adder for Energy-Efficient Applications20.372020
Circuit-Level Techniques for Logic and Memory Blocks in Approximate Computing Systemsx00.342020
POLAR: A Pipelined/Overlapped FPGA-Based LSTM Accelerator10.352020
RandShift: An Energy-Efficient Fault-Tolerant Method in Secure Nonvolatile Main Memory10.352020
Interstice: Inverter-Based Memristive Neural Networks Discretization for Function Approximation Applications00.342020
O⁴-DNN: A Hybrid DSP-LUT-Based Processing Unit With Operation Packing and Out-of-Order Execution for Efficient Realization of Convolutional Neural Networks on FPGA Devices10.372020
TOSAM: An Energy-Efficient Truncation- and Rounding-Based Scalable Approximate Multiplier80.582019
A Theoretical Framework for Quality Estimation and Optimization of DSP Applications Using Low-Power Approximate Adders.40.402019
OCTAN: An On-Chip Training Algorithm for Memristive Neuromorphic Circuits10.352019
ACHILLES: Accuracy-Aware High-Level Synthesis Considering Online Quality Management00.342019
Space Expansion of Feature Selection for Designing more Accurate Error Predictors.00.342019
Energy Consumption and Lifetime Improvement of Coarse-Grained Reconfigurable Architectures Targeting Low-Power Error-Tolerant Applications.10.352018
PX-CGRA: Polymorphic approximate coarse-grained reconfigurable architecture40.432018
An Efficient False Path-Aware Heuristic Critical Path Selection Method with High Coverage of the Process Variation Space.10.352018
An Ultra Low-Power Memristive Neuromorphic Circuit for Internet of Things Smart Sensors.50.452018
An Energy-Efficient, Yet Highly-Accurate, Approximate Non-Iterative Divider10.372018
TheSPoT: Thermal Stress-Aware Power and Temperature Management for Multiprocessor Systems-on-Chip.100.592018
RAP-CLA: A Reconfigurable Approximate Carry Look-Ahead Adder.110.622018
Approximate Reverse Carry Propagate Adder for Energy-Efficient DSP Applications.30.392018
PHAX: Physical Characteristics Aware Ex-Situ Training Framework for Inverter-Based Memristive Neuromorphic Circuits.30.432018
Toward Approximate Computing for Coarse-Grained Reconfigurable Architectures.10.482018
Lifetime improvement by exploiting aggressive voltage scaling during runtime of error-resilient applications.40.442018
Energy and Reliability Improvement of Voltage-Based, Clustered, Coarse-Grain Reconfigurable Architectures by Employing Quality-Aware Mapping.30.452018
Dual-Quality 4: 2 Compressors for Utilizing in Dynamic Accuracy Configurable Multipliers.100.642017
Robust neuromorphic computing in the presence of process variation.10.412017
LETAM: A low energy truncation-based approximate multiplier.20.392017
An energy and area efficient yet high-speed square-root carry select adder structure.20.402017
RoBA Multiplier: A Rounding-Based Approximate Multiplier for High-Speed yet Energy-Efficient Digital Signal Processing.150.762017
Hybrid TFET-MOSFET circuit: A solution to design soft-error resilient ultra-low power digital circuit.00.342017
CL-CPA: A hybrid carry-lookahead/carry-propagate adder for low-power or high-performance operation mode.00.342017
TruncApp: A truncation-based approximate divider for energy efficient DSP applications.20.392017
Efficient Critical Path Identification Based on Viability Analysis Method Considering Process Variations.20.372017
All-Region Statistical Model for Delay Variation Based on Log-Skew-Normal Distribution.40.452016
High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels30.422016
Seerad: A High Speed Yet Energy-Efficient Rounding-Based Approximate Divider40.482016
Hybrid TFET-MOSFET circuits: An approach to design reliable ultra-low power circuits in the presence of process variation10.352016
  • 1
  • 2