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B.-J. LEE
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Name
Affiliation
Papers
B.-J. LEE
Seoul Nat. Univ., South Korea
10
Collaborators
Citations
PageRank
38
104
19.31
Referers
Referees
References
340
90
33
Search Limit
100
340
Publications (10 rows)
Collaborators (38 rows)
Referers (100 rows)
Referees (90 rows)
Title
Citations
PageRank
Year
Design Optimization of On-Chip Inductive Peaking Structures for 0.13- $\mu{\hbox {m}}$ CMOS 40-Gb/s Transmitter Circuits
11
1.49
2009
Design Optimization of On-Chip Inductive Peaking Structures for 0.13-μm CMOS 40-Gb/s Transmitter Circuits.
0
0.34
2009
Design Optimization of On-Chip Inductive Peaking Structures for 0.13-<formula formulatype="inline"><tex Notation="TeX">$\mu{\hbox {m}}$</tex></formula> CMOS 40-Gb/s Transmitter Circuits
0
0.34
2009
A Single-Pair Serial Link for Mobile Displays With Clock Edge Modulation Scheme
7
0.84
2007
A 512-Mb Ddr3 Sdram Prototype With C-Io Minimization And Self-Calibration Techniques
21
4.02
2006
A 512-Mb Ddr3 Sdram Prototype With C-Io Minimization And Self-Calibration Techniques
21
4.02
2006
A 20-GHz Phase-Locked Loop for 40-Gb/s Serializing Transmitter in 0.13-<tex>$muhboxm$</tex>CMOS
7
1.30
2006
A 1.2-V-only 900-mW 10 gb ethernet transceiver and XAUI interface with robust VCO tuning technique
7
0.94
2005
A 2.5 - 10-Gb/s CMOS transceiver with alternating edge-sampling phase detection for loop characteristic stabilization
19
3.60
2003
A 5-Gb/s 0.25-μm CMOS jitter-tolerant variable-interval oversampling clock/data recovery circuit
11
2.43
2002
1