Author Info
Name
Affiliation
Papers
RIICHIRO TAKEMURA
Cent Res Lab, Kokubunji, Tokyo 1858601, Japan
13
Collaborators
Citations 
PageRank 
27
44
26.44
Referers 
Referees 
References 
145
91
21
Search Limit
100145
Title
Citations
PageRank
Year
Small-Sized Leakage-Controlled Gated Sense Amplifier For 0.5-V Multi-Gigabit Dram Arrays00.342012
A Low-V-T Small-Offset Gated-Preamplifier For Sub-1-V Dram Mid-Point Sensing00.342012
Spin-transfer torque RAM technology: Review and prospect.111.302012
0.5-V 25-Nm 6-T Cell With Boosted Word Voltage For 1-Gb Srams00.342012
Fluctuation tolerant read scheme for ultrafast DNA sequencing with nanopore device10.542012
Fluctuation Tolerant Charge-Integration Read Scheme For Ultrafast Dna Sequencing With Nanopore Device21.002012
Device-Conscious Circuit Designs For 0.5-V High-Speed Memory-Rich Nanoscale Cmos Lsis20.532011
Low-Vt small-offset gated preamplifier for sub-1V gigabit DRAM arrays.00.342009
2Mb Spin-Transfer Torque RAM (SPRAM) with Bit-by-Bit Bidirectional Current Write and Parallelizing-Direction Current Read.2219.972007
Low-voltage limitations and challenges of memory-rich nano-scale CMOS LSIs20.412007
Long-Retention-Time, High-Speed Dram Array With 12-F-2 Twin Cell For Sub 1-V Operation00.342007
A 0.5-V FD-SOI twin-cell DRAM with offset-free dynamic-VT sense amplifiers40.642006
A ternary/quaternary CAM architecture with an NPU-side IP-address compression scheme and a dynamic re-configurable CODEC scheme for large-scale flow-table lookup.00.342005