Name
Affiliation
Papers
SEBASTIEN THURIES
CEA Grenoble, LETI, F-38054 Grenoble, France
17
Collaborators
Citations 
PageRank 
107
27
7.32
Referers 
Referees 
References 
108
255
60
Search Limit
100255
Title
Citations
PageRank
Year
IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management30.452021
2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm<sup>2</sup> Inter-Chiplet Interconnects and 156mW/mm<sup>2</sup>@ 82%-Peak-Efficiency DC-DC Converters00.342020
Test Solutions for High Density 3D-IC Interconnects - Focus on SRAM-on-Logic Partitioning00.342019
Advanced 3d Technologies And Architectures For 3d Smart Image Sensors00.342019
Monolithic 3D: an alternative to advanced CMOS scaling, technology perspectives and associated design methodology challenges00.342018
Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells.00.342017
7.5 A TCXO-less 100Hz-minimum-bandwidth transceiver for ultra-narrow-band sub-GHz IoT cellular networks20.582017
Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits.00.342017
Drc2: Dynamically Reconfigurable Computing Circuit Based On Memory Architecture00.342016
Thermal performance of CoolCube™ monolithic and TSV-based 3D integration processes00.342016
Opportunities brought by sequential 3D CoolCube™ integration00.342016
Recent advances in 3D VLSI integration00.342016
Intermediate BEOL process influence on power and performance for 3DVLSI00.342015
From 2D to Monolithic 3D: Design Possibilities, Expectations and Challenges10.372015
A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool.151.032015
An Unbalanced Area Ratio Study for High Performance Monolithic 3D Integrated Circuits30.592015
3DCoB: A new design approach for Monolithic 3D Integrated circuits.30.582014