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SHIN'ICHIRO MUTOH
Author Info
Open Visualization
Name
Affiliation
Papers
SHIN'ICHIRO MUTOH
NTT Corp, NTT Microsyst Integrat Lab, Atsugi, Kanagawa 2430198, Japan
9
Collaborators
Citations
PageRank
21
64
7.01
Referers
Referees
References
138
129
40
Search Limit
100
138
Publications (9 rows)
Collaborators (21 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
General Stability of Stepwise Waveform of an Adiabatic Charge Recycling Circuit With Any Circuit Topology.
5
0.46
2012
Utilising the normal distribution of the write noise margin to easily predict the SRAM write yield.
0
0.34
2012
Reexamination of SRAM Cell Write Margin Definitions in View of Predicting the Distribution.
14
0.88
2011
Design And Performance Of A Sub-Nano-Ampere Two-Stage Power Management Circuit In 0.35-Mu M Cmos For Dust-Size Sensor Nodes
0
0.34
2011
Adiabatic SRAM with a shared access port using a controlled ground line and step-voltage circuit.
10
0.74
2010
Stable Adiabatic Circuit Using Advanced Series Capacitors And Time Variation Of Energy Dissipation
4
0.45
2010
A 1-V Cyclic A/D Converter Using Fd-Soi Sample/Hold Circuits For Sensor Networks
0
0.34
2005
A 2-Mb/s, UHF-band, wireless sensor node for real-time multi-point sensing
1
0.40
2004
Design Method of MTCMOS Power Switch for Low-Voltage High-Speed LSIs
30
3.06
1999
1