Benoît Dupont de Dinechin

Author Info

Name	Affiliation	Papers
BENOÎT DUPONT DE DINECHIN	Kalray, F-38330 Montbonnot St Martin, France	21
Collaborators	Citations	PageRank
76	197	12.60
Referers	Referees	References
481	557	264

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100557

Publications (21 rows)

Collaborators (76 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Response time analysis of dataflow applications on a many-core processor with shared-memory and network-on-chip	0	0.34	2019
DOL-BIP-Critical: a tool chain for rigorous design and implementation of mixed-criticality multi-core systems.	1	0.36	2018
A Distributed Framework for Low-Latency OpenVX over the RDMA NoC of a Clustered Manycore	0	0.34	2018
Mixed-criticality scheduling on cluster-based manycores with shared communication and storage resources	23	0.88	2016
Optimal and fast throughput evaluation of CSDF.	0	0.34	2016
Mpi Communication On Mppa Many-Core Noc: Design, Modeling And Performance Issues	0	0.34	2015
Time-critical computing on a single-chip massively parallel processor	51	1.52	2014
A Distributed Run-Time Environment for the Kalray MPPA®-256 Integrated Manycore Processor.	0	0.34	2013
A clustered manycore processor architecture for embedded and accelerated applications	60	1.89	2013
Scheduling an interval ordered precedence graph with communication delays and a limited number of processors.	1	0.37	2013
Extended Cyclostatic Dataflow Program Compilation And Execution For An Integrated Manycore Processor	21	1.02	2013
K-Periodic schedules for evaluating the maximum throughput of a Synchronous Dataflow graph	8	0.71	2012
A non-iterative data-flow algorithm for computing liveness sets in strict SSA programs	2	0.37	2011
Efficient Spilling Reduction for Software Pipelined Loops in Presence of Multiple Register Types in Embedded VLIW Processors	2	0.38	2011
Inter-block Scoreboard Scheduling in a JIT Compiler for VLIW Processors	2	0.43	2008
SCAN: a heuristic for near-optimal software pipelining	9	0.57	2006
Extending Modulo Scheduling with Memory Reference Merging	0	0.34	1999
A Unified Software Pipeline Construction Scheme for Modulo Scheduled Loops	4	0.47	1997
Definition of the F-- Extension to Fortran 90	2	0.50	1997
Parametric Computation of Margins and of Minimum Cumulative Register Lifetime Dates	6	0.56	1996
Insertion Scheduling: An Alternative to List Scheduling for Modulo Schedulers	5	0.54	1995