Bharat Garg - Citegraph

Author Info

Name	Affiliation	Papers
BHARAT GARG	ABV Indian Inst Informat Technol & Management Gwa, Gwalior, India	27
Collaborators	Citations	PageRank
31	32	9.88
Referers	Referees	References
60	258	145

Search Limit

100258

Publications (27 rows)

Collaborators (31 rows)

Referers (60 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
A Novel Multilayer Decision Based Iterative Filter For Removal Of Salt And Pepper Noise	0	0.34	2021
Reconfigurable Carry Look-Ahead Adder Trading Accuracy For Energy Efficiency	0	0.34	2021
A power and area efficient approximate carry skip adder for error resilient applications	0	0.34	2020
A Novel Low Complexity Logic Encryption Technique for Design-for-Trust	0	0.34	2020
Design of Current Differencing Transconductance Amplifier using a Novel Approach of Transconductance Boosting for High Frequency Applications.	0	0.34	2020
An Efficient Accuracy Reconfigurable CLA Adder Designs Using Complementary Logic	0	0.34	2020
Min-Max Average Pooling Based Filter For Impulse Noise Removal	3	0.39	2020
Four stage median-average filter for healing high density salt and pepper noise corrupted images.	2	0.37	2020
LoBA: A Leading One Bit Based Imprecise Multiplier for Efficient Image Processing.	4	0.45	2020
New lightweight Anti-SAT block design and obfuscation technique to thwart removal attack	0	0.34	2020
ES-COINA: A novel energy scalable quality-aware color interpolation architecture	0	0.34	2019
A process-tolerant low-power adder architecture for image processing applications	1	0.37	2019
Area-Delay Efficient and Low-Power Carry Skip Adder for High Performance Computing Systems	0	0.34	2019
New Lightweight Architectures for Secure FSM Design to Thwart Fault Injection and Trojan Attacks.	0	0.34	2018
An Energy-Efficient Trusted FSM Design Technique to Thwart Fault Injection and Trojan Attacks	3	0.41	2018
New Light Weight Threshold Voltage Defined Camouflaged Gates for Trustworthy Designs.	2	0.38	2017
New Energy Efficient Reconfigurable FIR Filter Architecture and Its VLSI Implementation.	0	0.34	2017
ACM: An Energy-Efficient Accuracy Configurable Multiplier for Error-Resilient Applications.	2	0.38	2017
RICO: A low power repetitive iteration CORDIC for DSP applications in portable devices.	0	0.34	2016
A quality-aware Energy-scalable Gaussian Smoothing Filter for image processing applications.	3	0.41	2016
A low-cost energy efficient image scaling processor for multimedia applications	1	0.37	2016
Bit-width-aware constant-delay run-time Accuracy Programmable Adder for error-resilient applications.	4	0.41	2016
An area and performance aware ECG encoder design for wireless healthcare services	0	0.34	2016
SPAA-Aware 2D Gaussian Smoothing Filter Design Using Efficient Approximation Techniques	4	0.45	2015
Energy Aware Computation Driven Approximate DCT Architecture for Image Processing	0	0.34	2015
Paid: Process Aware Imprecise Dct Architecture Trading Quality For Energy Efficiency	2	0.39	2015
Energy scalable approximate DCT architecture trading quality via boundary error-resiliency	1	0.37	2014