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SARA CHOI
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Name
Affiliation
Papers
SARA CHOI
School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea
6
Collaborators
Citations
PageRank
10
4
2.17
Referers
Referees
References
18
70
15
Publications (6 rows)
Collaborators (10 rows)
Referers (18 rows)
Referees (70 rows)
Title
Citations
PageRank
Year
Self-Referenced Single-Ended Resistance Monitoring Write Termination Scheme for STT-RAM Write Energy Reduction
0
0.34
2021
Offset-Cancellation Sensing-Circuit-Based Nonvolatile Flip-Flop Operating in Near-Threshold Voltage Region
0
0.34
2019
Offset-Canceling Single-Ended Sensing Scheme With One-Bit-Line Precharge Architecture for Resistive Nonvolatile Memory in 65-nm CMOS
2
0.39
2019
Offset-Cancellation Sensing-Circuit-Based Nonvolatile Flip-Flop Operating in Near-Threshold Voltage Region.
0
0.34
2019
A Decoder for Short BCH Codes With High Decoding Efficiency and Low Power for Emerging Memories.
0
0.34
2019
Corner-Aware Dynamic Gate Voltage Scheme to Achieve High Read Yield in STT-RAM.
2
0.43
2016
1