Name
Title | ||
|---|---|---|
System-level design space exploration for security processor prototyping in analytical approaches |
Abstract | ||
|---|---|---|
The customization of architectures in designing the security processor-based systems typically involves time-consuming simulation and sophisticated analysis in the exploration of design spaces. In this paper, we present an analytical modeling strategy for synoptically exploring of the candidate architectures of security processor-based systems. We demonstrate examples to employ our analytical models for design space explorations of embedded security systems to deal with scalability issues and architecture constraints. The experiments with the cycle-accurate simulation exhibit the applicability of analytical modeling: average prediction error is less than 10% while speed improvement is in several orders of magnitude. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1109/ASPDAC.2005.1466192 | ASP-DAC |
Keywords | DocType | Volume |
embedded security systems,security processor-based system,architecture customization,cycle-accurate simulation exhibit,design space,average prediction error,microprocessor chips,integrated circuit modelling,architecture constraint,security processor prototyping,analytical approach,analytical modeling strategy,design space exploration,analytical model,system-level design space exploration,integrated circuit design,analytical modeling,embedded security system,embedded systems,opc,prediction error,dissection,yield,system level design | Conference | 1 |
ISSN | ISBN | Citations |
2153-6961 | 0-7803-8736-8 | 1 |
PageRank | References | Authors |
0.42 | 10 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yung Chia Lin | 1 | 58 | 7.69 |
| Chung-Wen Huang | 2 | 37 | 5.91 |
| Jenq Kuen Lee | 3 | 459 | 48.71 |