Name
Abstract | ||
|---|---|---|
Power leakage constitutes an increasing fraction of the total power consumption in modern semiconductor technologies due to the continuing size reductions and increasing speeds of transistors. Recent studies have attempted to reduce leakage power using integrated architecture and compiler power-gating mechanisms. This approach involves compilers inserting instructions into programs to shut down and wake up components, as appropriate. While early studies showed this approach to be effective, there are concerns about the large amount of power-control instructions being added to programs due to the increasing amount of components equipped with power-gating controls in SoC design platforms. In this article we present a sink-n-hoist framework for a compiler to generate balanced scheduling of power-gating instructions. Our solution attempts to merge several power-gating instructions into a single compound instruction, thereby reducing the amount of power-gating instructions issued. We performed experiments by incorporating our compiler analysis and scheduling policies into SUIF compiler tools and by simulating the energy consumption using Wattch toolkits. The experimental results demonstrate that our mechanisms are effective in reducing the amount of power-gating instructions while further reducing leakage power compared to previous methods. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1145/1278349.1278364 | ACM Trans. Design Autom. Electr. Syst. |
Keywords | Field | DocType |
compact power-gating control,power-gating instruction,additional key words and phrases: compilers for low power,increasing amount,balanced scheduling,power-gating mechanisms acm reference format:,large amount,suif compiler tool,compiler analysis,compiler power-gating mechanism,leakage-power reduction,data-flow analysis,power-gating control,total power consumption,leakage power,power leakage,power control,data flow analysis | Scheduling (computing),Computer science,Parallel computing,Data-flow analysis,Real-time computing,Compiler,Power gating,Transistor,Merge (version control),Energy consumption,Power consumption,Embedded system | Journal |
Volume | Issue | ISSN |
12 | 4 | 1084-4309 |
Citations | PageRank | References |
12 | 0.58 | 25 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yi-Ping You | 1 | 143 | 12.89 |
| Chung-Wen Huang | 2 | 37 | 5.91 |
| Jenq Kuen Lee | 3 | 459 | 48.71 |