Name
Title | ||
|---|---|---|
3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections |
Abstract | ||
|---|---|---|
Three-dimensional (3D) integration using through-silicon vias (TSVs) and low-volume lead-free solder interconnects allows the formation of high signal bandwidth, fine pitch, and short-distance interconnections in stacked dies. There are several approaches for 3D chip stacking including chip to chip, chip to wafer, and wafer to wafer. Chip-to-chip integration and chip-to-wafer integration offer the ability to stack known good dies, which can lead to higher yields without integrated redundancy. In the future, with structure and process optimization, wafer-to-wafer integration may provide an ultimate solution for the highest manufacturing throughput assuming a high yield and minimal loss of good dies and wafers. In the near term, chip-to-chip and chip-to-wafer integration may offer high yield, high flexibility, and high performance with added time-to-market advantages. In this work, results are reported for 3D integration after using a chip-to-wafer assembly process using 3D chip-stacking technology and fine-pitch interconnects with lead-free solder. Stacks of up to six dies were assembled and characterized using lead-free solder interconnections that were less than 6 µm in height. The average resistance of the TSV including the lead-free solder interconnect was as low as 21 mΩ. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1147/JRD.2008.5388567 | IBM Journal of Research and Development |
Keywords | Field | DocType |
chip-to-chip integration,chip-to-wafer integration offer,through-silicon vias,low-volume lead-free interconnection,wafer-to-wafer integration,lead-free solder interconnection,high signal bandwidth,chip-stacking technology,chip-to-wafer integration,high yield,high flexibility,high performance,lead-free solder,through silicon via,chip | Wafer,Flip chip,System on a chip,Computer science,Electronic engineering,Chip,Soldering,Die (manufacturing),Three-dimensional integrated circuit,Interconnection | Journal |
Volume | Issue | ISSN |
52 | 6 | 0018-8646 |
Citations | PageRank | References |
18 | 2.53 | 5 |
Authors | ||
13 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| K. Sakuma | 1 | 113 | 25.43 |
| P. S. Andry | 2 | 106 | 22.38 |
| C. K. Tsang | 3 | 106 | 22.38 |
| S. L. Wright | 4 | 18 | 2.53 |
| Dang, B. | 5 | 110 | 22.83 |
| C. S. Patel | 6 | 188 | 22.62 |
| B. C. Webb | 7 | 106 | 22.38 |
| J. Maria | 8 | 18 | 2.53 |
| E. J. Sprogis | 9 | 128 | 24.81 |
| S. K. Kang | 10 | 18 | 2.87 |
| R. J. Polastre | 11 | 97 | 18.50 |
| R. R. Horton | 12 | 99 | 18.83 |
| J. U. Knickerbocker | 13 | 124 | 31.11 |