Name
Abstract | ||
|---|---|---|
In this paper we present an experimental study of the gate damage exhibited by commercial n-channel power MOSFETs during ion exposure. The investigation has been performed in different bias conditions showing a strongly non linear relationship between the bias voltages at which the gate damage occurred. In addition, the gate damage observed at VGS=0V is quite dissimilar from what observed at negative gate-source voltages. In facts, at low gate-source voltage bias the gate damage mechanism progressively appears like a cumulative effect, while at higher voltage bias an abrupt gate damage reveals a typical single event effect. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1016/j.microrel.2006.07.069 | Microelectronics Reliability |
Keywords | Field | DocType |
cumulant | Voltage source,Power semiconductor device,Power MOSFET,Electronic engineering,Time-dependent gate oxide breakdown,Low voltage,Engineering,MOSFET,Single event upset,Biasing | Journal |
Volume | Issue | ISSN |
46 | 9 | 0026-2714 |
Citations | PageRank | References |
2 | 0.79 | 3 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| G. Busatto | 1 | 52 | 17.57 |
| F. Iannuzzo | 2 | 106 | 42.25 |
| A. Porzio | 3 | 14 | 5.02 |
| A. Sanseverino | 4 | 25 | 11.27 |
| F. Velardi | 5 | 31 | 12.32 |
| G. Currò | 6 | 14 | 5.69 |