Title | ||
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A statistical model of logic gates for Monte Carlo simulation including on-chip variations |
Abstract | ||
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Process variations are becoming a paramount design problem in nano-scale VLSI. We present a framework for the statistical model of logic gates that describes both inter-die and intra-die variations of performance parameters such as propagation delay and leakage currents. This allows fast but accurate behavioral-level Monte-Carlo simulations, that could be useful for full-custom digital design optimization and yield prediction, and enables the development of a yield-aware digital design flow. The model can incorporate correlation between mismatch parameters and dependence on distance and position, and can be extracted by fitting of Monte-Carlo transistor level simulations. An example implementation using Verilog-A hardware description language in Cadence environment is presented. |
Year | DOI | Venue |
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2007 | 10.1007/978-3-540-74442-9_50 | PATMOS |
Keywords | Field | DocType |
monte carlo simulation,cadence environment,accurate behavioral-level monte-carlo simulation,yield-aware digital design flow,logic gate,paramount design problem,example implementation,statistical model,full-custom digital design optimization,intra-die variation,verilog-a hardware description language,monte-carlo transistor level simulation,on-chip variation,propagation delay,chip,hardware description language,digital design,process variation,leakage current,monte carlo | Monte Carlo method,Logic gate,Propagation delay,Computer science,Electronic engineering,Design flow,Logic simulation,Statistical model,Very-large-scale integration,Hardware description language | Conference |
Volume | ISSN | ISBN |
4644 | 0302-9743 | 3-540-74441-X |
Citations | PageRank | References |
1 | 0.38 | 13 |
Authors | ||
5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Francesco Centurelli | 1 | 56 | 15.93 |
luca giancane | 2 | 123 | 8.15 |
Mauro Olivieri | 3 | 385 | 36.09 |
giuseppe scotti | 4 | 308 | 39.14 |
A. Trifiletti | 5 | 433 | 63.29 |