Name
Abstract | ||
|---|---|---|
A defective-part-level model combined with a method for choosing test patterns that use site observation can predict defect levels in submicron ICs more accurately than simple stuck-at fault analysis. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1109/54.902820 | IEEE Design & Test of Computers |
Keywords | Field | DocType |
defective-part-level prediction,defect level,simple stuck-at fault analysis,defect-oriented testing,submicron ics,use site observation,test pattern,defective-part-level model,figure of merit,part per million,integrated circuit,fault detection | Stuck-at fault,Automatic test pattern generation,Fault analysis,Fault coverage,Fault detection and isolation,Computer science,Figure of merit,Electronic engineering,Design team,Integrated circuit,Computer engineering,Reliability engineering | Journal |
Volume | Issue | ISSN |
18 | 1 | 0740-7475 |
Citations | PageRank | References |
33 | 2.08 | 9 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jennifer Dworak | 1 | 132 | 11.63 |
| Jason D. Wicker | 2 | 33 | 2.08 |
| Sooryong Lee | 3 | 87 | 7.63 |
| Michael R. Grimaila | 4 | 264 | 29.53 |
| M. Ray Mercer | 5 | 679 | 108.73 |
| Kenneth M. Butler | 6 | 755 | 64.77 |
| Bret Stewart | 7 | 58 | 5.02 |
| Li-C. Wang | 8 | 201 | 17.53 |