Name
Title | ||
|---|---|---|
A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization. |
Abstract | ||
|---|---|---|
While analog-to-digital converter (ADC)-based serial link receivers enable powerful digital equalization for high data rate operation, the ADC and digital equalization power consumption is a key concern in applications that support operation over a wide range of channels with varying amounts of intersymbol interference (ISI). This paper presents a hybrid ADC-based receiver architecture which emplo... |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/JSSC.2015.2504555 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Receivers,Reliability,Bit error rate,Decision feedback equalizers,Attenuation,Detectors | Intersymbol interference,Equalization (audio),Computer science,Communication channel,Adaptive equalizer,CMOS,Electronic engineering,Successive approximation ADC,Detector,Bit error rate | Journal |
Volume | Issue | ISSN |
51 | 3 | 0018-9200 |
Citations | PageRank | References |
6 | 0.79 | 9 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ayman Shafik | 1 | 71 | 9.73 |
| Ehsan Zhian Tabasy | 2 | 43 | 6.20 |
| Shengchang Cai | 3 | 20 | 5.28 |
| Keytaek Lee | 4 | 11 | 2.46 |
| Sebastian Hoyos | 5 | 234 | 29.24 |
| Samuel Palermo | 6 | 142 | 22.07 |