Name
Title | ||
|---|---|---|
An FPGA-based infrastructure for fine-grained DVFS analysis in high-performance embedded systems. |
Abstract | ||
|---|---|---|
Emerging technologies provide SoCs with fine-grained DVFS capabilities both in space (number of domains) and time (transients in the order of tens of nanoseconds). Analyzing these systems requires cycle-accurate accounting of rapidly-changing dynamics and complex interactions among accelerators, interconnect, memory, and OS. We present an FPGA-based infrastructure that facilitates such analyses for high-performance embedded systems. We show how our infrastructure can be used to first generate SoCs with loosely-coupled accelerators, and then perform design-space exploration considering several DVFS policies under full-system workload scenarios, sweeping spatial and temporal domain granularity. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1145/2897937.2897984 | DAC |
Field | DocType | Citations |
Modeling and simulation,Scheduling (computing),Computer science,Workload,Energy harvesting,Field-programmable gate array,Real-time computing,Electronic engineering,Emerging technologies,Granularity,Interconnection,Embedded system | Conference | 6 |
PageRank | References | Authors |
0.48 | 22 | 7 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Paolo Mantovani | 1 | 106 | 10.58 |
| Emilio G. Cota | 2 | 53 | 4.10 |
| Kevin Tien | 3 | 7 | 0.84 |
| Christian Pilato | 4 | 329 | 32.19 |
| Giuseppe Di Guglielmo | 5 | 107 | 15.57 |
| Kenneth L. Shepard | 6 | 404 | 53.01 |
| Luca P. Carloni | 7 | 1713 | 120.17 |